An Improved Strong Arm Comparator with Integrated Static Preamplifier

This paper presents a novel Strong Arm comparator in which the input pair is reused as static amplifier to preamplify signal during precharge phase. The proposed approach relaxes main trade-offs that characterize latch: compared conventional topology, enhanced achieves better input-referred noise and offset, without penalizing delay nor power consumption. In fact, topology even more efficient than its counterpart it exhibits lower consumption when two circuits are sized have same delay. operation of new analyzed detail through comprehensive theoretical analysis, providing useful design criteria. validated by means post-layout simulations 55 nm CMOS technology with 1 V supply. show improves noise, offset energy-delay product (EDP) respectively 28.5%, 33.8% 5.24% latch.